1. Field of the Invention
The present invention relates to masks used in photolithography of integrated circuit designs, and in particular, masks used in ray or charged particle beam lithography.
2. Description of Related Art
One of the most critical parameters of masks fabricated for advanced photolithography of integrated circuit designs is image placement error. This is particularly important for membrane masks such as those used in x-ray or charged particle beam lithography such as ion beam and, in particular, projection electron-beam lithography (PEBL). An embodiment of PEBL is referred to as the SCALPEL.TM. (scattering angular limited projection electron lithography) process. Projection electron-beam lithography requires masks that are at least semi-transparent to electrons. For this reason, these masks contain membranes that are very thin, on the order of 50-200 nm.
An example of the well-known PEBL lithography is shown in FIG. 1. Electron beam radiation 30 passes through a portion of mask 18 comprising a membrane layer 20 on which are deposited scatterer layer segments conforming to the circuit image to be projected. The electron beam 30 portion that passes with relatively low scatter through the membrane 20 portion between scatterer segments 22 is illustrated by beam 30a. Beam 30a is focused by lens system 24 and through an opening in back focal plane filter 26 onto the surface 32 of a semiconductor wafer having conventional resist materials sensitive to the electron beam radiation. Electron beam portion 30b which is scattered to a greater degree by scatterer segments 22 is somewhat focused by lens 24 but does not pass fully through the opening in filter 26. Thus, a contrasting image 28 is formed on wafer resist surface 32 which conforms to the pattern of scatterer layer 22 on the mask.
These lithography masks have to be robust, resistant to breakage and strong enough to minimize any in-plane distorting forces that occur as a result of processing. To minimize membrane breakage, the mask structure includes supporting struts which subdivide the membrane into areas of equal size and aspect ratio. It is within these uniform membrane areas that the radiation-absorbing scatterer or patterning layers must be formed to project the configuration of the individual circuit features or elements onto the different chip layers.
The format for a typical PEBL or SCALPEL.TM. mask is shown in FIGS. 2 and 3. The mask consists of a patterned scatterer layer 22 on top of a thin membrane material 16 of thickness t. In the side view shown in FIG. 2, membrane 16 covers essentially all the upper surface of mask 18. Typical scatterer layer materials include W, Cr/W, TaSi, Cr/TaSi, and combinations with other Ta-based compounds. Because the membrane is so thin, silicon struts are needed to reinforce the membrane, and strengthen the mask structure. The underlying support is formed from silicon layer 34 and protective layer 36, and openings are etched therein to form equi-spaced supporting struts 42 in a uniform pattern within outer supports 44. On a typical PEBL mask, there will be many membranes interlaced with struts in an arrangement similar to the one shown in FIG. 2. It is between struts 42 that the individual scatterer layers form patterns 22 corresponding to circuit features or elements on membrane areas 20. Each membrane area 20 needs to be small enough so that it is self-supporting, and any distortions due to patterning the scatterer layer are minimized. As shown in the bottom view in FIG. 3, the membrane areas 20 in the openings between struts 42 which contain the mask features have uniform size and aspect ratio. A typical size of the discrete membrane areas over the entire mask is about 12 mm.sup.2 with a typical aspect ratio of 12:1 (width:length) as seen in plan view, or about 1 mm.sup.2 with an aspect ratio of 1:1, again over the entire mask.
Alternatively, in stencil masks used for ion beam lithography or other configuration of electron beam lithography, the membrane material is used as the radiation absorber and openings which permit radiation passage are made which conform to the configuration of the individual circuit elements. In either case, the circuit design is subject to the size and aspect ratio of the uniform membrane areas on the mask.
Typical prior art membrane thicknesses and discrete membrane areas for various photolithography mask technologies are shown below in Table 1:
TABLE 1 Discrete Membrane Membrane Thickness Area Area/Thickness Mask Technology (nm) (mm.sup.2) (mm.sup.2 /nm) SCALPEL .TM. 150 13 0.09 PEBL stencil 1500 1 0.001 IPL stencil 3,000 2,500 0.83 X-ray 2,000 750 0.38
Bearing in mind the problems and deficiencies of the prior art, it is therefore an object of the present invention to provide an improved mask for use in ion beam and/or projection electron beam lithography.
It is another object of the present invention to provide such a lithography mask which is stronger and more robust than prior art masks.
A further object of the invention is to provide such a lithography mask which may be used for complex circuit patterns without limiting strength.
It is yet another object of the present invention to provide masks for the aforementioned uses which do not have prior restrictions on membrane opening size or aspect ratio.
Still other objects and advantages of the invention will in part be obvious and will in part be apparent from the specification.